library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL; 

entity output is
	
	port(
		enable: in std_logic;
		satisfied: in std_logic;
		LED1: out std_logic;
		LED2: out std_logic
	);
	
end output;

architecture output_behavior of output is

signal one: std_logic;
signal two: std_logic; 

begin --architecture
	
process(enable, satisfied)

begin --process

	if enable = '1' then		
		if satisfied = '1' then
			one <= '1';
			two <= '1';
		else
			one <= '1';
			two <= '0';
		end if;
		
	else
		
		one <= '0';
		two <= '0';
		
	end if;	  	
end process;

process(one, two)

begin --process
LED1 <= one;
LED2 <= two;

end process;

end architecture output_behavior;
		
	
	


		